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Computer ScienceISC Class 12 · Computer Hardware

Logic Gates and NAND, NOR as Universal Gates (ISC Class 12 Computer Science)

Updated 17 October 2026 · Draft, not yet fact-checked

The seven elementary gates are NOT, AND, OR, NAND, NOR, XOR and XNOR. NAND and NOR are universal: NOT, AND and OR can each be built from NAND gates alone (or NOR gates alone), so any Boolean circuit can be redrawn using only one of them. Apply De Morgan's theorem to convert a circuit.

Understand Logic Gates and NAND, NOR as Universal Gates

The seven gates. For inputs A and B:

ABANDORNANDNORXORXNOR
00001101
01011010
10011010
11110001

NOT gives A'. AND gives A·B and OR gives A + B. NAND is (A·B)' and NOR is (A + B)'. XOR is A'B + AB' (1 when the inputs differ). XNOR is AB + A'B' (1 when the inputs agree), which is (A ⊕ B)'.

Circuit from an expression. Each product becomes an AND gate, each sum an OR gate, each complement a NOT gate. Assume complements are available as inputs when the question says so.

Universal gates. A gate set is universal if every Boolean function can be built from it. With NAND only:

  • NOT: A NAND A = (A·A)' = A'.
  • AND: (A NAND B) fed to a NAND used as NOT gives AB. Two gates.
  • OR: A' NAND B' = (A'·B')' = A + B (De Morgan). Three gates.

With NOR only:

  • NOT: A NOR A = A'.
  • OR: (A NOR B) fed to a NOR used as NOT gives A + B. Two gates.
  • AND: A' NOR B' = (A' + B')' = AB. Three gates.

Sum of products in NAND-NAND form. To realise F = AB + CD, double-complement and use De Morgan: F = ((AB + CD)')' = ((AB)'·(CD)')'. That is two NAND gates for the products feeding a third NAND. In general an SOP circuit of AND-OR gates becomes a NAND-NAND circuit with the same structure. Similarly a POS circuit becomes NOR-NOR.

Half and full adders, encoders, decoders and multiplexers are the next topic.

Logic Gates and NAND, NOR as Universal Gates: key facts

NAND and NOR
  • NAND: (A·B)'
  • NOR: (A + B)'
  • NAND is 0 only when all inputs are 1
  • NOR is 1 only when all inputs are 0
Both are universal gates.
XOR and XNOR
  • XOR: A⊕B = A'B + AB'
  • XNOR: (A⊕B)' = AB + A'B'
  • XOR is 1 when inputs differ
  • XNOR is 1 when inputs agree
XOR of three inputs is odd parity.
NOT, AND, OR from NAND
NOTA NAND A
ANDNAND followed by NAND as NOT (2 gates)
ORNOT A and NOT B into a NAND (3 gates)
Each uses De Morgan's theorem.
NOT, AND, OR from NOR
NOTA NOR A
ORNOR followed by NOR as NOT (2 gates)
ANDNOT A and NOT B into a NOR (3 gates)
The dual of the NAND constructions.

How to answer Logic Gates and NAND, NOR as Universal Gates questions

Use this routine to convert a circuit or expression to NAND-only (or NOR-only).

  1. 1Write the expression in SOP form for NAND (POS form for NOR).
  2. 2Put a double bar over the whole expression.
  3. 3Apply De Morgan once to the inner bar: the sum of products becomes a product of NANDed terms.
  4. 4Each term (AB)' is one NAND gate; the outer bar is one more NAND gate.
  5. 5Replace each lone complement by a NAND with both inputs tied together.
  6. 6Count the gates and verify two or three input rows.

Logic Gates and NAND, NOR as Universal Gates in real life

The idea, met in an everyday situation. Answer the question in your own words, then compare with the model answer. The one-line hook is what to remember.

Two-switch staircase light

Suppose a staircase light has one switch at the top (A) and one at the bottom (B), and flipping either switch changes the state of the light.

Which gate describes the light, and what is its output when both switches are up (A = B = 1)?

Try it first, then show the solutionSolution
  1. The light changes when exactly one switch differs from the other, so it is XOR.
  2. For A = 1 and B = 1 the inputs agree, so XOR = 0.

Answer: XOR gate; the output is 0 (light off).

Memory hook: XOR means "different".

Alarm that needs both sensors off

Suppose a store lamp turns on only when both the motion sensor (A) and the door sensor (B) are quiet (0).

Name the gate and give the output for A = 0, B = 0.

Try it first, then show the solutionSolution
  1. Output is 1 only when all inputs are 0, which is NOR.
  2. For 0, 0: (0 + 0)' = 1.

Answer: NOR gate; the lamp is on (1).

Memory hook: NOR: nothing on, so output on.

Tricks to remember Logic Gates and NAND, NOR as Universal Gates

Short memory aids. Say each one aloud once, then use it on a question the same day.

  • N means flip

    NAND and NOR are AND and OR with the output flipped.

    Use it when: Filling the NAND and NOR columns.

  • XOR = different

    XOR is 1 when the inputs are different; XNOR is 1 when they are the same.

    Use it when: Quick truth tables.

  • Tie the inputs

    Joining both inputs of a NAND or NOR gives a NOT gate.

    Use it when: Building NOT from universal gates.

  • Double bar, break once

    Put two bars on the function and break the lower one with De Morgan.

    Use it when: NAND-NAND conversion.

Logic Gates and NAND, NOR as Universal Gates: solved examples

Ordered from board level to HOTS. Try each one before you open the solution.

Example 1: XNOR output · 1 mark · MCQBoard level

What is the output of an XNOR gate when A = 1 and B = 0?
(a) 0 (b) 1 (c) undefined (d) A

Try it first, then show the solutionSolution
  1. XNOR is 1 when the inputs agree.
  2. The inputs 1 and 0 differ, so the output is 0.

Answer: (a) 0

Example 2: AND, OR and NOT from NAND · 3 marks · Short answerHarder board level

Show how NOT, AND and OR gates are built using NAND gates only. State the number of NAND gates for each.

Try it first, then show the solutionSolution
  1. NOT: tie both inputs, (A·A)' = A'. One gate. (1 mark)
  2. AND: X = (A·B)', then X NAND X = (X)' = AB. Two gates. (1 mark)
  3. OR: A NAND A = A', B NAND B = B', then (A'·B')' = A + B by De Morgan. Three gates. (1 mark)

Answer: NOT: 1 gate, AND: 2 gates, OR: 3 gates.

Example 3: SOP to NAND-NAND · 3 marks · Short answerHarder board level

Realise F = AB + CD using NAND gates only. Show the algebra and count the gates.

Try it first, then show the solutionSolution
  1. Double complement: F = ((AB + CD)')'. (1 mark)
  2. De Morgan on the inner bar: F = ((AB)'·(CD)')'. (1 mark)
  3. Two NAND gates give (AB)' and (CD)'; a third NAND combines them. Total 3 NAND gates. (1 mark)

Answer: F = ((AB)'·(CD)')'; three 2-input NAND gates.

Example 4: XOR using four NAND gates · 4 marks · Short answerHarder board level

N1 = (A·B)', N2 = (A·N1)', N3 = (B·N1)' and F = (N2·N3)'. Find F for (A, B) = (0, 1) and (1, 1) and say which gate F realises.

Try it first, then show the solutionSolution
  1. (0, 1): N1 = (0·1)' = 1; N2 = (0·1)' = 1; N3 = (1·1)' = 0; F = (1·0)' = 1. (1.5 marks)
  2. (1, 1): N1 = (1·1)' = 0; N2 = (1·0)' = 1; N3 = (1·0)' = 1; F = (1·1)' = 0. (1.5 marks)
  3. Checking (0, 0) gives 0 and (1, 0) gives 1, so F = 1 exactly when A and B differ. (1 mark)

Answer: F = 1 for (0, 1) and 0 for (1, 1); the circuit is an XOR gate.

Example 5: Case: staircase light · 4 marks · Case-basedHOTS / competency

Suppose a staircase light is controlled by two switches A and B and the light is ON when the two switch positions are different.
(i) Name the gate and write F in SOP form. (1 mark)
(ii) Give the output for the inputs (1, 0) and (1, 1). (1 mark)
(iii) Which single gate gives the opposite output for all inputs? (1 mark)
(iv) How many NAND gates are needed for F in the best known form? (1 mark)

Try it first, then show the solutionSolution
  1. (i) XOR, F = A'B + AB'.
  2. (ii) (1, 0) gives 1; (1, 1) gives 0.
  3. (iii) XNOR, which is the complement of XOR.
  4. (iv) Four NAND gates, as in the previous example.

Answer: (i) XOR, A'B + AB' (ii) 1 and 0 (iii) XNOR (iv) 4 NAND gates

Where students lose marks in Logic Gates and NAND, NOR as Universal Gates

The slips examiners see most often, and what to write instead.

  • Mistake: Confusing NOR with XNOR

    NOR is 1 only for 00; XNOR is 1 for 00 and 11.

    Wrong working

    NOR(1, 1) = 1

    Right working

    NOR(1, 1) = (1 + 1)' = 0

    Do this: Add the inputs first, then flip.

    Usually costs: 1 mark

  • Mistake: Skipping the double bar

    Without it the De Morgan step has nothing to break and the NAND form is not justified.

    Wrong working

    AB + CD = (AB)' + (CD)'

    Right working

    AB + CD = ((AB)'·(CD)')'

    Do this: Write two bars, break the lower one.

    Usually costs: 1 mark

  • Mistake: Using a single NAND for OR

    OR from NAND needs two NOT-type gates and one NAND, not a direct single gate.

    Wrong working

    A NAND B = A + B

    Right working

    A' NAND B' = A + B (3 gates)

    Do this: Complement the inputs first.

    Usually costs: 1 mark

Exam tips

  • Draw the standard symbols; a small circle on the output means inversion.
  • Label every internal wire (N1, N2) so the examiner can follow the trace.
  • State the number of gates in each NAND or NOR construction.
  • Verify the final circuit for at least two input rows.
  • For XOR and XNOR give both the table and the expression.

Practice questions on Logic Gates and NAND, NOR as Universal Gates

Write each answer on paper first. Open the hint only if you are stuck, and the answer only when you have finished.

  1. Q1 · 1 mark · MCQBoard level

    A gate outputs 0 for inputs (0, 0) and (1, 1) but 1 for (0, 1) and (1, 0). Which gate is it?
    (a) XNOR (b) XOR (c) NAND (d) OR

    Hint

    Different inputs give 1.

    Answer

    (b) XOR

  2. Q2 · 2 marks · Short answerBoard level

    Write the truth table of a 2-input NAND gate and say why it is called a universal gate.

    Hint

    It can build the three basic gates.

    Answer

    Outputs for (A, B) = 00, 01, 10, 11 are 1, 1, 1, 0. It is universal because NOT, AND and OR, and hence every circuit, can be made from NAND gates alone.

  3. Q3 · 3 marks · Short answerHarder board level

    Realise Y = A + B' using NOR gates only. Show the gates, count them and verify for A = 0, B = 1.

    Hint

    NOR with tied inputs is NOT; a NOR followed by a NOT is OR.

    Answer

    N1 = B NOR B = B'. N2 = A NOR N1 = (A + B')'. Y = N2 NOR N2 = A + B'. Three NOR gates. For A = 0, B = 1: N1 = 0; N2 = (0 + 0)' = 1; Y = (1 + 1)' = 0, and A + B' = 0 + 0 = 0.

  4. Q4 · 2 marks · Short answerHarder board level

    A circuit has X = A NAND B and F = X NAND X. Write F in terms of A and B, and find F for A = 1, B = 1.

    Hint

    Tied NAND is NOT.

    Answer

    X = (AB)'; F = (X·X)' = X' = AB, an AND gate. For A = 1, B = 1: X = 0 and F = (0·0)' = 1.

  5. Q5 · 3 marks · Case-basedHOTS / competency

    F = (A ⊕ B) ⊕ C, where ⊕ is XOR. Find F for (A, B, C) = (1, 1, 0), (1, 1, 1), (0, 0, 0) and (1, 0, 0). What does F detect?

    Hint

    Compute the inner XOR first.

    Answer

    (1, 1, 0): 1⊕1 = 0, then 0⊕0 = 0. (1, 1, 1): 0⊕1 = 1. (0, 0, 0): 0. (1, 0, 0): 1⊕0 = 1, then 1⊕0 = 1. F is 1 when an odd number of inputs are 1, so it detects odd parity.

Test your recall

Answer in your head or on paper first, then open the card. Pulling an answer out of memory makes it stick far better than re-reading.

  1. 1.When is a NAND gate output 0?Show answer

    Only when all inputs are 1.

  2. 2.When is a XNOR gate output 1?Show answer

    When the inputs are equal.

  3. 3.How do you make a NOT gate from a NAND gate?Show answer

    Join both inputs together.

  4. 4.Which two gates are universal?Show answer

    NAND and NOR.

  5. 5.What is the Boolean expression of XOR?Show answer

    A'B + AB'.

  6. 6.How many NAND gates make an OR gate?Show answer

    Three.

Logic Gates and NAND, NOR as Universal Gates: frequently asked questions

Why are NAND and NOR called universal gates?

Because the NOT, AND and OR operations, and so every Boolean function, can be built using only NAND gates or only NOR gates.

What is the difference between XOR and OR?

OR is 1 when at least one input is 1; XOR is 1 only when exactly one input is 1, so for 1 and 1 OR gives 1 but XOR gives 0.

How is a circuit converted to NAND gates only?

Write the function as SOP, double-complement it, apply De Morgan once, and replace every AND-OR structure by NAND-NAND with NOT as a tied NAND.

Do the logic symbols matter in the ISC theory paper?

Questions often ask for a logic gate diagram of the reduced expression, so the standard symbols and correct connections matter.